H. T. Vergos - Professor


Go to content

Research

Research Areas

Dr. Vergos research efforts have been focused on the following topics :

  • Cache memory architectures for fault tolerance and yield enhancement. This was the subject of Dr Vergos' Ph.D. thesis in which 3 different techniques to combat permanent defects in embedded cache memories and their effects on the average memory access time were proposed. A yield prediction model for processors with a single / double cache level was also derived.


  • Testing of arithmetic circuits for stuck-at and delay faults and efficient BIST architetcures for them. A number of fully testable under the path-delay fault model arithmetic circuits architectures have been proposed and design rules have been derived for elevating well-known architectures to robustly testable ones.


  • Low power testing methods for arithmetic circuits and exploration of the trade-off between testability and power consumption. A number of low power testing techniques for arithmetic circuits have been proposed. Some of them are the basis for the techniques currently met in many commercial FPGAs for their multiplier cores' testing.


  • Sophisticated tools for arithmetic circuit and efficient BIST structures generation. Eudoxus and Kover (see publications section) are examples of such tools.


  • Hardware-software co-design methodologies for rapid prototyping of systems.


  • Efficient RNS arithmetic circuit architectures. Our team was the first to prove that 1's complement addition and multiplication is as fast as the 2's complement one and has proposed the fastest currently known modulo 2n-1 and modulo 2n+1 adders and multipliers.


  • Arithmetic circuits in QCA technology. A number of arithmetic circuit architectures have been proposed for this promising technology.


  • IP Core watermarking We have extended already proposed methods and introduced new ones to certify the existence of a watermark in an IP embedded deep in a SoC, considering watermarks inserted either at the FSM of a core or using its power signature.




Current research collaborators

  • Dimitris Bakalis, Assistant Professor, Dept. of Physics, University of Patras.


  • Konstantinos Vasilas, Computer Engineer.



Past research collaborators

  • Dimitris Adamidis, Computer Engineer, M.Sc., currently with Information Technology and Services, Texas Instruents.


  • George Alexiou, Emeritus Professor, CEID, University of Patras.


  • Aggeliki Anastasiou, Computer Engineer, Research Assistant at Visualization and Virtual Reality Group, Patras University.


  • Maciej Bellos, Computer Engineer, Ph.D., M.Sc., Electronics Engineer at Larisa University Hospital.


  • Anastasios Bikos, Computer Engineer, currently with 5G Cybersecurity Architect, Huawei Technologies.


  • Georgios Blanas, Computer Engineer.


  • Olympia Giannou, Computer Engineer, Ph.D, currently with Leica Geosystems.


  • Giorgos Dimitrakopoulos, Professor, Electrical and Computer Eng. Dept., Democritus University of Thrace.


  • Costas Efstathiou, Professor, Dept. of Informatics and Computer Engineering, University of West Attica.


  • Emmanouel Kalligeros, Associate Proffesor, Information and Communication Systems Eng. Dept., University of the Aegean.


  • Chrysovalantis Kavousianos, Professor, Dept. of Computer Science & Engineering, University of Ioannina.


  • John Kalamatianos, Computer Engineer, Ph.D., Fellow Design Engineer (CPU/GPU Performance Analyst & Modeler), AMD.


  • Lampros Kalampoukas, Computer Engineer, Ph.D., Founder and CTO/VP Eng. at Alphonso Inc and LG Ads Inc.


  • Nikolaos Kostaras, Computer Engineer, M.Sc., Director of Engineering, Voiceweb.


  • Dimitris Nikolos, Professor, CEID, University of Patras.


  • Anastasia Spyrou, Computer Engineer, M.Sc., Senior Software Engineer, currently with NetBet.


  • Evangelos Vassalos, Electronics Engineer, Ph.D., M.Sc., Senior Hardware Engineer, Irida Labs.











Back to content | Back to main menu