H. T. Vergos - Professor


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Diploma Theses

Teaching


For conducting a Dimploma Thesis under my supervision, the following must be met:

  • Your GPA should be 7 or more, and you should have less than 5 courses left for gradulation,
  • You should have a score of 6,5 or more in both Logic Design and Computer Architecture,
  • You should have successfully completed at least two of the following elective courses: E-CAD, VLSI I, VLSI II or Advanced Computer Architetcure Topics, and
  • You should be able to model in HDL, simulate and synthesize a circuit/system in an FPGA/ASIC technology.





Available Diploma Theses for 2024-2025

  • Near Data Processing Architectures : Synchronization Methods. (1 person, bibliographic and simulation work).
  • Approximate Adder Architectures (1 person, bibliographic, modeling and measurement work).


If interested apply by email attaching a copy of your transcript, no later than the 10th of October.


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